1. Field of the Invention
This invention relates to a programmable partially distributed masking mechanism and more particularly to such a mechanism which can be programmably set to accommodate data segments having formats of different data path widths.
2. Description of the Prior Art
The proliferation in recent years of microprocessors, i.e., a data processor on a single integrated circuit chip, has accommodated ever increasing applications of such microprocessors in intelligent terminals, personal computers and the like. Furthermore, increasing advances in the integrated circuit field have allowed such microprocessors to be designed with increasingly greater numbers of gates per chip thus resulting in microprocessors of increasing power or throughput. Originally, the first microprocessors has 8 bit wide data path widths. The next generation of microprocessors had 16 bit wide data path widths and now microprocessors with 32 bit wide data path widths are becoming readily available in the commercial market.
A feature almost inherent in such microprocessors and one that has facilitated their design on single integrated circuit chips has been that of microprogramming or microprogram control. The term "microprogram" was first coined by Maurice Wilkes in his paper "The Best Way to Design an Automated Calculating Machine", Report of the Manchester University Computer Inaugural Conference, Manchester, England, July 1951, pp 16-18. This concept did not really become practical until the advent of the first integrated circuits which had only a few gates per chip. Those initial circuits are now referred to as small scale integrated circuits (SSI). A second generation of such chips with a greater number of chips are now known as medium scale integrated circuits (MSI) and today such circuits employing many thousands of gates are available and referred to as very large scale integrated circuits (VLSI). It is this vast increase in the number of gates per chip that has allowed for the more powerful microprocessors currently available with the resulting increase in size in the microprogram stores employed in order to handle all of the sequences of microinstructions required to control such powerful microprocessors.
A particular concept that has helped to reduce the number of microinstructions to be stored has been that of two levels of control stores where the lower level contains only each unique microinstruction rather than sequences of such microinstructions which were redundant. A smaller memory in terms of word or instruction widths was supplied to contain a sequence of encoded microinstructions which served to address the corresponding lower level microinstructions. Such a system is described in the Faber et al. U.S. Pat. No. 3,983,539. In such a system, the lower level control store could be a read only memory, which is cheaper than a random access memory, while the upper level memory would be a random access memory. To distinguish the shorter vertical microinstructions in the upper level memory and the longer horizontal microinstructions in the lower level memory, the upper level memory was called the micromemory and the inventors of the Faber patent called the lower level memory a nanomemory and the horizontal microinstructions which may be just one or more fields of unencoded control bits, were called nanoinstructions.
A particular family of microprocessors employing such a two-level control store is disclosed in the Tredennick et al. U.S. Pat. No. 4,342,078.
As such microprocessors have increased in power or throughput through the increased width of their data paths from 8 to 16 and now 32 bits, data formatted for the smaller sized microprocessors cannot be readily accommodated by the processors with larger data path widths due to problems in the arithmetic unit such as when to generate a carry signal, etc., in the adder and also in the barrel switch or shifting mechanism which is employed to shift data either right or left and is also able to accommodate shifting end around or end off for different data formats. A masking mechanism is provided to, inter alia, mask off that portion of the data bus when a small data format is being employed.
Data and control buses used to interconnect functions of a processor implemented within a single integrated circuit occupy space on that integrated circuit. A reduction in the size of these buses allows a reduction in the size and therefore the cost of the integrated circuit.
It is then an object of the present invention to provide an improved masking mechanism that can accommodate different data formats under program control.
It is still another object of the present invention to provide an improved masking mechanism for the simulation of a processor having different data path widths.
It is still a further object of the present invention to provide an improved masking mechanism where the different data segments have different widths.